1. Field of the Invention
This invention relates generally to time measurement, and, more particularly, to time measurement circuits and methods for use with automatic test equipment.
2. Description of Related Art
Automatic test equipment (ATE) is commonly used for testing semiconductor components and electronic assemblies. ATE reduces costs to manufacturers of electronics by allowing them to test their products early in the manufacturing process. Early testing allows defective units to be identified and discarded before substantial additional costs are incurred. In addition, ATE allows manufacturers to grade different units according their tested levels of performance. Better performing units can then be sold at generally higher prices.
ATE relies heavily upon accurate time measurements for its diagnostic precision. In ATE systems, time is generally measured between “events.” Events generally correspond to signal transitions. For example, an event can be a digital signal going from low to high, or an analog signal crossing a predefined threshold at the input to a comparator. Regardless of their origin, events generally translated to signal edges, which can then be used to trigger time measurement circuitry.
Several techniques have been used to measure the timing of events in automatic test equipment. One technique involves the use of a high speed clock and a digital counter. A first event, generally called a START event, causes the clock to begin incrementing the counter at a rate of once per clock cycle. A second event, generally called a STOP event, causes the counter to stop incrementing. According to this technique, the time interval between START and STOP is computed as the number of counts held by the counter times the clock period. Although this technique works well for measuring intervals that are relatively long in relation to the clock period, its resolution is limited to the clock period.
Another time measurement technique has been developed that significantly improves resolution. As in the technique above, a digital counter is incremented to produce a coarse count of clock cycles between START and STOP. However, time is also measured between the START event and the clock, and between the STOP event and the clock, using linear interpolation. The coarse count is then adjusted to account for time measured in these leading and trailing intervals.
Linear interpolation is generally accomplished with an analog ramp circuit, which is arranged to measure the leading and trailing intervals. According to this technique, a current source is switched to a capacitor upon the occurrence of an event (e.g., START or STOP). In response to the event, the voltage across the capacitor is linearly charged from a baseline value toward an upper limit. Upon a subsequent clock edge, a sampling circuit (such as an analog-to-digital converter with a sample-and-hold) samples the capacitor voltage. Once the sample is taken, the capacitor is discharged. Owing to the linear nature of the ramp, the sampled voltage is directly proportional to the time between the event and the clock edge, and can be converted to time by linear interpolation.
The ramp technique greatly improves resolution. Rather than being limited by the clock period, resolution is limited by clock period divided by the number of bits that the sampling circuit applies to its measurement of the ramp.
Although resolution is greatly improved, we have recognized that the ramp technique involves certain shortcomings. For example, it employs complex analog circuitry, which generally requires careful design by expert engineers. When design specifications are changed, such as for developing new products, expensive redesigns are often required. Perhaps most significantly, a relatively long delay (often tens of clock periods) is generally needed to restore the ramp to an accurate baseline value. This delay limits the re-trigger time of the ramp, and hence limits the rate at which successive measurements can be made. In automatic test equipment, measurement rate is an important figure of merit. Systems that can complete measurements at higher speeds can reduce test times, and thus can reduce the overall costs associated with testing electronics.
In recent years, a great deal of emphasis has been placed on the ability of ATE to measure the timing jitter of test signals. As is known, “timing jitter” refers to variations in the timing locations of signal edges. Jitter can include random components as well as periodic components. Jitter is generally ascertained by repeating a signal edge a large number of times and repeatedly measuring its location. An automatic test system then computes statistical variations in the edge location to provide a measure of jitter.
As jitter measurement becomes a more important feature of automatic test equipment, the rate at which time measurements can be conducted becomes more critical. It would therefore be desirable for an automatic test system to include high resolution time measurement circuits that can be re-triggered at high speed. It would also be desirable to avoid some of the other drawbacks of the ramp technique.